Ticket #7804: fix_typo.patch

File fix_typo.patch, 7.2 KB (added by oss.2012.team+F1@…, 10 years ago)

patch for boost/atomic/detail/gcc-armv6plus.hpp

  • boost/atomic/detail/gcc-armv6plus.hpp

     
    5757// indicates the mode, so 1 is added to indicate that the destination code is Thumb.
    5858// A temporary register is needed for the address and is passed as an argument to these
    5959// macros.  It must be one of the "low" registers accessible to Thumb code, specified
    60 // usng the "l" attribute in the asm statement.
     60// using the "l" attribute in the asm statement.
    6161//
    6262// Architecture v7 introduces "Thumb 2", which does include (almost?) all of the ARM
    6363// instruction set.  So in v7 we don't need to change to ARM mode; we can write "universal
  • boost/atomic/detail/gcc-ppc.hpp

     
    4848    it that values carried in registers are extended appropriately and
    4949    everything falls into place naturally).
    5050
    51     The register constrant "b"  instructs gcc to use any register
     51    The register constraint "b"  instructs gcc to use any register
    5252    except r0; this is sometimes required because the encoding for
    5353    r0 is used to signify "constant zero" in a number of instructions,
    5454    making r0 unusable in this place. For simplicity this constraint
  • boost/atomic/detail/linux-arm.hpp

     
    1414// Intel/Marvell XScale chips like the one in the NSLU2) have only atomic swap.
    1515// On Linux the kernel provides some support that lets us abstract away from
    1616// these differences: it provides emulated CAS and barrier functions at special
    17 // addresses that are garaunteed not to be interrupted by the kernel.  Using
     17// addresses that are guaranteed not to be interrupted by the kernel.  Using
    1818// this facility is slightly slower than inline assembler would be, but much
    1919// faster than a system call.
    2020//
  • libs/atomic/test/atomicity.cpp

     
    2121// we get 0.995 probability to detect a race (if there is one).
    2222//
    2323// Overall this yields 0.995 * 0.995 > 0.99 confidence that the
    24 // operations truely behave atomic if this test program does not
     24// operations truly behave atomic if this test program does not
    2525// report an error.
    2626
    2727#include <algorithm>
  • libs/atomic/doc/platform.qbk

     
    6868  Some amount of care must be taken as the "raw" data type
    6969  passed in from the user through [^boost::atomic<T>]
    7070  is visible here -- it thus needs to be type-punned or otherwise
    71   manipulated byte-by-byte to avoid using overloaded assigment,
     71  manipulated byte-by-byte to avoid using overloaded assignment,
    7272  comparison operators and copy constructors.
    7373
    7474[endsect]
     
    302302[section:platform_atomic_puttogether Putting it altogether]
    303303
    304304The template specializations should be put into a header file
    305 in the [^boost/atomic/detail] directory, preferrably
     305in the [^boost/atomic/detail] directory, preferably
    306306specifying supported compiler and architecture in its name.
    307307
    308308The file [^boost/atomic/detail/platform.hpp] must
  • libs/atomic/doc/atomic.hpp

     
    142142        implement the operation).
    143143
    144144        The established memory order will be @c order if the operation
    145         is successful. If the operation is unsuccesful, the
     145        is successful. If the operation is unsuccessful, the
    146146        memory order will be
    147147
    148148        - @c memory_order_relaxed if @c order is @c memory_order_acquire ,
     
    162162        \param desired Desired new value
    163163        \param success_order Memory ordering constraint if operation
    164164        is successful
    165         \param failure_order Memory ordering constraint if operation is unsuccesful
     165        \param failure_order Memory ordering constraint if operation is unsuccessful
    166166        \return @c true if value was changed
    167167
    168168        Atomically performs the following operation
     
    215215        where feasible.
    216216
    217217        The established memory order will be @c order if the operation
    218         is successful. If the operation is unsuccesful, the
     218        is successful. If the operation is unsuccessful, the
    219219        memory order will be
    220220
    221221        - @c memory_order_relaxed if @c order is @c memory_order_acquire ,
     
    235235        \param desired Desired new value
    236236        \param success_order Memory ordering constraint if operation
    237237        is successful
    238         \param failure_order Memory ordering constraint if operation is unsuccesful
     238        \param failure_order Memory ordering constraint if operation is unsuccessful
    239239        \return @c true if value was changed
    240240
    241241        Atomically performs the following operation
  • libs/atomic/doc/atomic.qbk

     
    115115
    116116[section:mutex Enforcing ['happens-before] through mutual exclusion]
    117117
    118 As an introductury example to understand how arguing using
     118As an introductory example to understand how arguing using
    119119['happens-before] works, consider two threads synchronizing
    120120using a common mutex:
    121121
     
    142142at [^m.lock()]. If this is be thread1, then as a consequence,
    143143thread2 cannot succeed at [^m.lock()] before thread1 has executed
    144144[^m.unlock()], consequently A ['happens-before] B in this case.
    145 By symmetry, if thread2 suceeds at [^m.unlock()] first, we can
     145By symmetry, if thread2 succeeds at [^m.unlock()] first, we can
    146146conclude B ['happens-before] A.
    147147
    148148Since this already exhausts all options, we can conclude that
     
    628628from C++11 as faithfully as possible, there are a few
    629629limitations that cannot be lifted without compiler support:
    630630
    631 * [*Using non-POD-classes as template paramater to `atomic<T>` results
     631* [*Using non-POD-classes as template parameter to `atomic<T>` results
    632632  in undefined behavior]: This means that any class containing a
    633633  constructor, destructor, virtual methods or access control
    634634  specifications is not a valid argument in C++98. C++11 relaxes
     
    666666  of [*Boost.Atomic] compiles and has correct value semantics.
    667667* [*native_api.cpp] verifies that all atomic operations have correct
    668668  value semantics (e.g. "fetch_add" really adds the desired value,
    669   returing the previous). It is a rough "smoke-test" to help weed
     669  returning the previous). It is a rough "smoke-test" to help weed
    670670  out the most obvious mistakes (for example with overflow,
    671671  signed/unsigned extension, ...).
    672672* [*lockfree.cpp] verifies that the [*BOOST_ATOMIC_*_LOCKFREE] macros