Boost C++ Libraries: Ticket #3341: sp_counted_base_gcc_sparc.hpp compile failure on gcc.4.2.3 w/-O2

Peter Dimov — Fri, 14 Aug 2009 11:35:29 GMT

According to

http://gcc.gnu.org/onlinedocs/gcc/Simple-Constraints.html

the proper constraint could be 'V' instead of 'm'.

jon_p_griffiths@… — Sat, 15 Aug 2009 18:14:40 GMT

the proper constraint could be 'V' instead of 'm'.

I tried +V before reporting but it also failed (with 'inconsistent asm contraints' IIRC). I found two sparc CAS implementations by googling (GASNet and the Linux kernel) - both use the following formulation:

__asm__ __volatile("cas [%2], %3, %0\n\t"
    : "=&r" (swap_)
    : "0" (swap_), "r" (dest_), "r" (compare_)
    : "memory");

This forces the address to be stored in a register, which avoids any offset addition in the emitted instruction. However, the Linux kernel implementation adds memory barriers before and after the CAS; it would be interesting to know whether they are really needed in this case.

For reference, I've tested the following version; it seems to be running without issues here:

inline int32_t compare_and_swap( volatile int32_t * dest_, int32_t compare_, int32_t swap_ )
{
    __asm__ __volatile__("membar #StoreLoad|#LoadLoad\n"
                         "cas [%2], %3, %0\n"
                         "membar #StoreLoad|#StoreStore\n"
                         : "=&r" (swap_)
                         : "0" (swap_), "r" (dest_), "r" (compare_)
                         : "memory");
    return swap_;
}

Cheers, Jon

Peter Dimov — Thu, 26 Nov 2009 18:21:23 GMT

(In [57949]) Fix SPARC asm operand failure. Refs #3678. Refs #3341.

status changed

Peter Dimov — Thu, 26 Nov 2009 18:25:46 GMT

status new → assigned

status changed; resolution set

Peter Dimov — Mon, 30 Nov 2009 20:17:16 GMT

status assigned → closed
resolution → fixed

(In [58063]) Merge [57949] to release. Fixes #3678. Fixes #3341.