Opened 12 years ago
Closed 11 years ago
#5327 closed Bugs (fixed)
MPS ISA issue related to ll / sc
| Reported by: | Owned by: | Peter Dimov | |
|---|---|---|---|
| Milestone: | To Be Determined | Component: | smart_ptr |
| Version: | Boost 1.45.0 | Severity: | Showstopper |
| Keywords: | mips ll sc assembler error | Cc: |
Description
boost/smart_ptr/detail/sp_counted_base_gcc_mips.hpp uses in its inline assembler ll/sc opcode for atomic operations (increment decremet). Both opcodes are available since MIPS II ISA - unfortunately gcc assumes MIPS ISA I as default - so the inline assembler from sp_counted_base_gcc_mips.hpp triggers an assembler error:
'opcode not supported on this processor : mips1 (ll/sc)'
The header could be patches so that it instructs the CPU to switch to ISA II for ll/sc.
Attachments (1)
Change History (4)
by , 12 years ago
| Attachment: | llsc-mips.patch added |
|---|
comment:1 by , 12 years ago
| Status: | new → assigned |
|---|
comment:3 by , 11 years ago
| Resolution: | → fixed |
|---|---|
| Status: | assigned → closed |
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patching inline assembler for MIPS